A. Technical Field
The present invention relates generally to systems and methods for integrated circuit (“IC”) packaging. And, the present invention relates more particularly to systems and methods for improving the thermal performance of integrated circuit package solutions.
B. Background of the Invention
Integrated circuits, also referred to chips, microchips, or semiconductor dies, are fragile and susceptible to many factors, such as mechanical stresses, chemical stresses, and thermal stresses. Prior to being used in an electronic system, an integrated circuit must be packaged to help minimize the impact of these stress factors. Packaging helps protect against mechanical stresses by providing structural support to the integrated circuit. By encapsulating the integrated circuit in a package, the integrated circuit is protected against environmental factors such as dust, moisture, and other items that could cause chemical stress or otherwise affect the circuit. However, the addition of material around the integrated circuit from the packaging can increase the thermal resistance and thereby increase thermal stresses on the chip. These thermal stresses can reduce the reliability of the integrated circuit and, in some cases, can result in its catastrophic failure.
FIG. 1 depicts a conventional semiconductor package. Shown in FIG. 1 is a lead-frame package semiconductor chip 100 comprising a semiconductor die 110 on a chip carrier 140, which may also be referred to as a die pad, paddle, or support. The semiconductor die 110 is typically attached to the die pad 140 via an adhesive 170, which may be an epoxy or an adhesive tape. The wire bonds 160 provide electrical connections from the integrated circuit 110 to the lead-frame bond fingers or pads 120. The die 110, die pad 140, and lead-frame bond fingers 120 (or at least a portion of the lead-frame bond fingers) are typically encapsulated in a mold material 150.
The power used during the operation of the circuit generates heat. When inside a package, the thermal resistance created by the packaging can inhibit the chip's ability to dissipate this generated heat. The thermal issues become more acute with increasing levels of power dissipation. The thermal issue is further compounded by advances in semiconductor integrated circuit design and manufacturing that have produced increasingly smaller and more powerful chips. As integrated circuits increase in both power used and processing speed, the heat generated also increases. Furthermore, as an integrated circuit decreases in size, the power density and heat density also increases. These thermal issues amplify the possibilities of decreased chip performance and failure due to excess heat.